1. Field
This disclosure relates generally to semiconductor memory devices, and more specifically, to a method for electrically trimming a non-volatile memory reference cell and a circuit featuring the electrically trimmed non-volatile memory reference cell.
2. Related Art
An NVM based reference cell current can drift if not trimmed to a stable state (e.g., near charge neutral for unbiased use condition). Under current practice, reference cells of NVM based component parts are trimmed to a single electrical target, which is not necessarily their most stable state due to NVM part-to-part variability due to transistor mismatch. To minimize cell drift in given NVM based components, an ability to trim the reference cells to their unique target corresponding to the natural asymptotic state for each respective NVM component would be desirable.
Current reference cell trim practice common throughout the industry, where program and erase operations are used on an NVM reference cell to target a specific output current from the cell, is in need of improvement.
Accordingly, there is a need for an improved method and apparatus for overcoming the problems in the art as discussed above.